1. Field of the Invention
The present invention generally relates to memory devices, and more particularly relates to increasing the bandwidth of DDR (double data rate) SDRAM (synchronous dynamic random access memory) modules.
2. Description of the Related Art
In the past, the widely held opinion was that the SPD (Serial Presence Detect) should be optimized primarily for the lowest possible timings of the CAS (column access strobe) latency. Less care was taken in the remaining three timings—tRP (RAS Precharge (precharge-to-activate delay)), tRCD (RAS to CAS delay), and tRAS (Active to Precharge delay)—accordingly the overall bandwidth of the module was not optimized to the degree possible.
By minimizing only the CAS latency, the module has a lower bandwidth, meaning that actual data transfer to and from the module is less than it could be.